D. Borrione

11 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

Mining Missing Assumptions from Counter-Examples

G. Plassan and others (2019) · Association for Computing Machinery (ACM)

Extraction of missing formal assumptions in under-constrained designs

Guillaume Plassan and others (2017) · ACM/IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE)

Improving the Efficiency of Formal Verification: The Case of Clock-Domain Crossings

Guillaume Plassan and others (2017) · IFIP advances in information and communication technology · Springer Science+Business Media

Conclusively verifying clock-domain crossings in very large hardware designs

Guillaume Plassan and others (2016) · IFIP/IEEE International Conference on Very Large Scale Integration

Efficient and Correct by Construction Assertion-Based Synthesis

K. Morin-Allory and others (2015) · Institute of Electrical and Electronics Engineers (IEEE)

Validation of Asynchronous Circuit Specifications Using IF/CADP

D. Borrione and others (2006) · Springer Science+Business Media

Proven correct monitors from PSL specifications

Katell Morin-Allory and others (2006) · Design, Automation, and Test in Europe

A proof of correctness for the construction of property monitors

Katell Morin-Allory and others (2005) · Proceedings · Institute of Electrical and Electronics Engineers

Formal verification of hardware designs

D. Borrione and others (1995) · Journal of the Brazilian Computer Society, Special Issue on Electronic Design Automation

A tutorial: formal methods for VHDL

D. Borrione and others (1994) · Euro-DAC 1994 with Euro-VHDL, Grenoble

CHARME: Towards formal design and verification for provably correct VLSI hardware

L. Claesen and others (1992) · Proceedings of the Advanced Research Workshop on Correct Hardware Design Methodologies