David Brooks
1 reference under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
A 16nm 25mm2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators
Paul N. Whatmough and others (2019) · Symposium on VLSI Circuits