Helmut Graeb

7 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

Verification and revision of the power-down mode for hierarchical analog circuits

Maximilian Neuner and others (2020) · Integration · Elsevier BV

Power-Down Mode Verification for Hierarchical Analog Circuits

Maximilian Neuner and others (2019) · IEEE

Analog Power-Down Synthesis

Michael Zwerger and others (2017) · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · Institute of Electrical and Electronics Engineers

Detection of Asymmetric Aging-Critical Voltage Conditions in Analog Power-Down Mode

Michael Zwerger and others (2015) · IEEE Conference Publications

Verification of the power-down mode of analog circuits by structural voltage propagation

Michael Zwerger and others (2014) · Analog Integrated Circuits and Signal Processing · Springer Science+Business Media

Short-circuit-path and floating-node verification of analog circuits in power-down mode

Michael Zwerger and others (2012) · IEEE

The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis

Tobias Massier and others (2008) · Institute of Electrical and Electronics Engineers (IEEE)