Hubert Garavel
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Hubert Garavel
Hubert Garavel, Inria Grenoble, lead of CADP: verification tools for concurrency applied to hardware (CHP semantics, SystemVerilog model checking), and the 2020 expert survey and report on formal methods in industry.
Formal Methods in Industry
Maurice H. ter Beek and others (2024) · Formal Aspects of Computing · Association for Computing Machinery
The 2020 expert survey on formal methods
Hubert Garavel and others (2020) · 25th International Conference on Formal Methods for Industrial Critical Systems (FMICS) · Springer
TOOLympics 2019: An Overview of Competitions in Formal Methods
Ezio Bartocci and others (2019) · Tools and Algorithms for the Construction and Analysis of Systems · Springer International Publishing
Reflections on Bernhard Steffen’s Physics of Software Tools
Hubert Garavel and others (2019) · Lecture notes in computer science · Springer Science+Business Media
Model-checking Synthesizable SystemVerilog Descriptions of Asynchronous Circuits
Aymane Bouzafour and others (2018) · 24th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) · IEEE
On the Semantics of Communicating Hardware Processes and their Translation into LOTOS for the Verification of Asynchronous Circuits with CADP
Hubert Garavel and others (2009) · Science of Computer Programming · Elsevier
Specification and Verification of the PowerScaleTM Bus Arbitration Protocol: An Industrial Experiment with LOTOS
Ghassan Chehaibar and others (1996) · IFIP advances in information and communication technology · Springer Science+Business Media
CADP a protocol validation and verification toolbox
Jean-Claude Fernandez and others (1996) · Springer Berlin Heidelberg