K. Morin-Allory

4 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

Formal Temporal Characterization of Register Vulnerability in Digital Circuits

D. Zuccalà and others (2023) · IEEE

Mining Missing Assumptions from Counter-Examples

G. Plassan and others (2019) · Association for Computing Machinery (ACM)

Clock domain crossing formal verification: a meta-model

M. Kebaili and others (2016) · IEEE

Efficient and Correct by Construction Assertion-Based Synthesis

K. Morin-Allory and others (2015) · Institute of Electrical and Electronics Engineers (IEEE)