Martin Vandepas
1 reference under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
A TDC-less ADPLL with 200-to-3200MHz range and 3mW power dissipation for mobile SoC clocking in 22nm CMOS
Nathaniel J. August and others (2012) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · Institute of Electrical and Electronics Engineers