Robert Norton
6 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8)
Robert N. M. Watson and others (2020) · CL Technical Reports
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 7)
Robert N. M. Watson and others (2019) · CL Technical Reports
CHERI Concentrate: Practical Compressed Capabilities
Jonathan Woodruff and others (2019) · Institute of Electrical and Electronics Engineers (IEEE)
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 6)
Robert N. M. Watson and others (2017) · Computer Laboratory, University of Cambridge
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 5)
Robert N. M. Watson and others (2016) · CL Technical Reports
The CHERI capability model: Revisiting RISC in an age of risk
Jonathan Woodruff and others (2014) · IEEE