This description was written by a machine and published without a person checking it. It is what the agent made of this grouping, and not a statement anybody has stood behind.

Alain J. Martin

A grouping.

Alain J. Martin, Caltech. Five records, acquired in one sequence from the institute's repository, and together they run a complete research programme from method to limit to silicon and back to theory. The corpus holds few authors this way.

1985 martin1985delayinsensitive a fair arbiter, derived and proved fair 1986 martin1986compiling the method: CSP-like programs compiled into delay-insensitive circuits 1990 martin1990limitations the limit: entirely delay-insensitive circuits are a nearly empty class 1993 martin1993tomorrows the demonstration: the first asynchronous microprocessor, working on first silicon 1995 manohar1995quasidelayinsensitive with Manohar: the compromise recovers Turing-completeness, and forbids an arbiter

**Read in order, the striking thing is that he published the boundary of his own programme.** martin1986compiling argues that a semantics-preserving translation makes the resulting circuit correct by construction. Four years later martin1990limitations proves that the class of circuits the method targets -- entirely delay-insensitive ones -- admits only C-elements as multiple-input operators and is therefore nearly useless, and names the **isochronic fork** as the weakest assumption that makes design possible again. Most authors leave that to critics.

**And the compromise is then priced, twice.** manohar1995quasidelayinsensitive shows the isochronic fork buys back everything computable, by constructing a QDI Turing machine -- and costs the arbiter, since QDI computations are provably deterministic. martin1993tomorrows shows what it costs in an actual chip: "with the exception of isochronic forks and the interfaces with the memories, the chips are entirely delay-insensitive". An impossibility, a named assumption, a theorem about what the assumption recovers, and the exact boundary in fabricated silicon. The corpus cannot follow any of its other threads that far.

**The 1985 arbiter is the subtle one** and should not be read as contradicting the 1995 result: it builds on a mutual-exclusion element taken as a primitive, which the paper itself describes as making a non-deterministic choice. It is also the strongest thing in derived-not-checked, because the property carried across the transformations is fairness -- a liveness property -- and it settled a question that had been conjectured the other way.

**His counterpart in this corpus is ebergen1989translating**, and the two lines are connected rather than parallel: Ebergen names Martin's technique as similar to his own, and Rem sent Ebergen to Caltech in 1982 for Chuck Seitz's course on self-timed systems. Where Martin compiles by transformation, Eindhoven translates a program syntax into fixed basic elements on the trace-structure formalism of snepscheut1983trace and udding1984classification.

The Caltech deposits hold twenty-four of his reports, 1982 to 2003, including an asynchronous microprocessor in gallium arsenide, low-energy asynchronous memory, and performance analysis of asynchronous circuits. Nothing beyond the five above is held here.

5 references

Quasi-delay-insensitive circuits are Turing-complete
Rajit Manohar and others (1995) · California Institute of Technology
Tomorrow's Digital Hardware will be Asynchronous and Verified
Alain J. Martin (1993) · California Institute of Technology
The Limitations to Delay-Insensitivity in Asynchronous Circuits
Alain J. Martin (1990) · Proceedings of the 6th MIT Conference on Advanced Research in VLSI · California Institute of Technology
Compiling Communicating Processes into Delay-Insensitive VLSI Circuits
Alain J. Martin (1986) · Distributed Computing · California Institute of Technology
A Delay-Insensitive Fair Arbiter
Alain J. Martin (1985) · California Institute of Technology