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Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology
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Abstract
Fault injection attacks are considered one of the major threats to cyber-physical systems. The increasing complexity of embedded microprocessors involves complicated behaviours in presence of such attacks. Realistic fault models are required to study code vulnerabilities and be able to protect digital systems from these attacks. However, inferring fault models using only limited observations of faulty microprocessors is difficult. In this article, we present experiments that show the difficulty of characterizing and modelling the fault injection effects. From there, we propose a complete approach for fault analysis to build proper fault models at different system levels, which will help in designing suitable countermeasures at reasonable cost.
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Cite it as
@misc{alshaer2021microarchitectureaware,
title = {Microarchitecture-aware Fault Models: Experimental Evidence and Cross-Layer Inference Methodology},
author = {Ihab Alshaer and Brice Colombier and Christophe Deleuze and Vincent Beroulle and Paolo Maistri},
year = {2021},
journal = {International Conference on Design \& Technology of Integrated Systems in Nanoscale Era (DTIS)},
pages = {1--6},
doi = {10.1109/dtis53253.2021.9505074},
}