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An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications

The work

AuthorsUtsav Banerjee; Andrew Wright; Chiraag Juvekar; Madeleine Waller; Arvind Arvind; Anantha P. Chandrakasan
Editors
Typearticle
Year2019
Citekeybanerjee2019energyefficient

Where it appeared

Published inIEEE Journal of Solid-State Circuits
PublisherInstitute of Electrical and Electronics Engineers
Volume54
Issue8
Pages2339--2352

From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.

Abstract

This paper presents the first hardware implementation of the datagram transport layer security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key component of this design is a reconfigurable prime field elliptic curve cryptography (ECC) accelerator that is 238× and 9× more energy-efficient compared to software and state-of-the-art hardware, respectively. Our full hardware implementation of the DTLS 1.3 protocol provides 438× improvement in energy-efficiency over software, along with code size and data memory usage as low as 8 and 3 KB, respectively. The cryptographic accelerators are coupled with an on-chip low-power RISC-V processor to benchmark applications beyond DTLS with up to two orders of magnitude energy savings. The test chip, fabricated in 65-nm CMOS, demonstrates hardware-accelerated DTLS sessions while consuming 44.08 μJ/handshake and 0.89 nJ/byte of the encrypted data at 16 MHz and 0.8 V.

How it got here

How it got hereagent via openalex
Added2026-10-25 17:03 UTC
Not denied bya person 2026-10-29 17:12 UTC

Cite it as

@article{banerjee2019energyefficient,
  title        = {An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications},
  author       = {Utsav Banerjee and Andrew Wright and Chiraag Juvekar and Madeleine Waller and Arvind Arvind and Anantha P. Chandrakasan},
  year         = {2019},
  journal      = {IEEE Journal of Solid-State Circuits},
  publisher    = {Institute of Electrical and Electronics Engineers},
  volume       = {54},
  number       = {8},
  pages        = {2339--2352},
  doi          = {10.1109/jssc.2019.2915203},
}

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