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Formal Processor Modeling for Analyzing Safety and Security Properties
The work
| Authors | Benjamin Binder; Samira Ait Bensaid; Simon Tollec; Farhat Thabet; Mihail Asavoae; Mathieu Jan |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 2022 |
| Citekey | binder2022formal |
Where it appeared
| Published in | Embedded Real Time Systems (ERTS) |
|---|
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-26 06:20 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@inproceedings{binder2022formal,
title = {Formal Processor Modeling for Analyzing Safety and Security Properties},
author = {Benjamin Binder and Samira Ait Bensaid and Simon Tollec and Farhat Thabet and Mihail Asavoae and Mathieu Jan},
year = {2022},
booktitle = {Embedded Real Time Systems (ERTS)},
}
This record lives at https://refs.drheap.org/binder2022formal/ and will keep doing so.