A reconfigurable system featuring dynamically extensible embedded microprocessor, FPGA, and customizable I/O
The work
| Authors | Michele Borgatti; Francesco Lertora; B. Forêt; L. Calì |
|---|---|
| Editors | |
| Type | article |
| Year | 2003 |
| Citekey | borgatti2003reconfigurable |
Where it appeared
| Published in | IEEE Journal of Solid-State Circuits |
|---|---|
| Publisher | Institute of Electrical and Electronics Engineers |
| Volume | 38 |
| Issue | 3 |
| Pages | 521--529 |
Identifiers
| DOI | 10.1109/jssc.2002.808288 |
|---|---|
| OpenAlex | W2564921634 |
Access
| Landing page | https://doi.org/10.1109/jssc.2002.808288 |
|---|
From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.
Abstract
A system chip targeting image and voice processing and recognition application domains is implemented as a representative of the potential of using programmable logic in system design. It features an embedded reconfigurable processor built by joining a configurable and extensible processor core and an SRAM-based embedded field-programmable gate array (FPGA). Application-specific bus-mapped coprocessors and flexible input/output peripherals and interfaces can also be added and dynamically modified by reconfiguring the embedded FPGA. The architecture of the system is discussed as well as the design flows for pre- and post-silicon design and customization. The silicon area required by the system is 20 mm2in a 0.18-μm CMOS technology. The embedded FPGA accounts for about 40% of the system area.
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-10-27 17:11 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@article{borgatti2003reconfigurable,
title = {A reconfigurable system featuring dynamically extensible embedded microprocessor, FPGA, and customizable I/O},
author = {Michele Borgatti and Francesco Lertora and B. Forêt and L. Calì},
year = {2003},
journal = {IEEE Journal of Solid-State Circuits},
publisher = {Institute of Electrical and Electronics Engineers},
volume = {38},
number = {3},
pages = {521--529},
doi = {10.1109/jssc.2002.808288},
}
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