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Automatic verification of synchronous circuits using symbolic logic simulation and temporal logic
The work
| Authors | S. Bose; A. L. Fisher |
|---|---|
| Editors | L. Claesen |
| Type | inproceedings |
| Year | 1989 |
| Citekey | bose1989automatic |
Where it appeared
| Published in | Applied Formal Methods for Correct VLSI Design (IMEC-IFIP International Workshop) |
|---|---|
| Pages | 759--764 |
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-25 03:23 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@inproceedings{bose1989automatic,
title = {Automatic verification of synchronous circuits using symbolic logic simulation and temporal logic},
author = {S. Bose and A. L. Fisher},
editor = {L. Claesen},
year = {1989},
booktitle = {Applied Formal Methods for Correct VLSI Design (IMEC-IFIP International Workshop)},
pages = {759--764},
}
This record lives at https://refs.drheap.org/bose1989automatic/ and will keep doing so.