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2-D DCT using on-line arithmetic

The work

AuthorsJ.D. Bruguera; Thomas A. Lang
Editors
Typemisc
Year1995
Also known asbruguera2002dct
Citekeybruguera1995dct

Where it appeared

Published inIEEE International Conference on Acoustics Speech and Signal Processing
Volume5
Pages3275--3278

From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.

Abstract

Presents a VLSI architecture for the evaluation of the (8/spl times/8)-point 2-D DCT with on-line arithmetic. The utilization of on-line arithmetic, in combination with an algorithm based on FCT and matrix multiplication, reduces the total hardware maintaining a data rate and a latency similar to approaches based on distributed or parallel arithmetic. The architecture has been integrated in a chip using a 1 /spl mu/ CMOS technology, occupying an area of 56.7 mm/sup 2/.

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Added2026-10-27 13:59 UTC
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Cite it as

@misc{bruguera1995dct,
  title        = {2-D DCT using on-line arithmetic},
  author       = {J.D. Bruguera and Thomas A. Lang},
  year         = {1995},
  journal      = {IEEE International Conference on Acoustics Speech and Signal Processing},
  volume       = {5},
  pages        = {3275--3278},
  doi          = {10.1109/icassp.1995.479584},
}

This record lives at https://refs.drheap.org/bruguera1995dct/ and will keep doing so. It used to be called bruguera2002dct, and those addresses still resolve to this one.