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Using Many Small 1T1C Memory Arrays in a Large and Dense Multicore Processor
The work
| Authors | Gunnar Carlstedt; Mats Rimborg |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 2022 |
| Citekey | carlstedt2022using |
Where it appeared
| Published in | Proceedings of the 2022 International Symposium on Memory Systems |
|---|---|
| Publisher | Association for Computing Machinery |
| Pages | 1--12 |
Identifiers
| DOI | 10.1145/3565053.3565057 |
|---|---|
| OpenAlex | W4386903443 |
Access
| Landing page | https://doi.org/10.1145/3565053.3565057 |
|---|---|
| Free full text | https://dl.acm.org/doi/pdf/10.1145/3565053.3565057 |
Empty on purpose
| copy |
Abstract
A memory system for multicore processors with a large number of processing elements (PE) is presented. Each PE has a local memory implemented in one-transistor one-capacitor (1T1C) DRAM technology, and these local memories contain many small memory arrays. The energy consumption and access time are reduced compared to state-of-the-art dynamic memories, while the aggregate bandwidth is increased by orders of magnitude.
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-08-04 00:00 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Filed under
Cite it as
@inproceedings{carlstedt2022using,
title = {Using Many Small 1T1C Memory Arrays in a Large and Dense Multicore Processor},
author = {Gunnar Carlstedt and Mats Rimborg},
year = {2022},
booktitle = {Proceedings of the 2022 International Symposium on Memory Systems},
publisher = {Association for Computing Machinery},
pages = {1--12},
doi = {10.1145/3565053.3565057},
}
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