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Symbolic Simulation for Correct Machine Design

The work

AuthorsW. C. Carter; William H. Joyner; Daniël Brand
Editors
Typemisc
Year1979
Citekeycarter1979symbolic

Where it appeared

Published inProceedings - ACM IEEE Design Automation Conference
PublisherAssociation for Computing Machinery
Volumexix
Pages280--286

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Abstract

Program verification techniques which manipulate symbolic rather than actual values have been used successfully to find errors in implementations of computer designs. This paper describes symbolic simulation, a method similar to symbolic execution of programs, and its use in proving the correctness of machine architectures implemented in microcode. The procedure requires formal descriptions of machines at both the architectural and register transfer levels, but has been used to detect errors in implementation which often elude the standard test case approach.

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Added2026-10-25 05:16 UTC
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Cite it as

@misc{carter1979symbolic,
  title        = {Symbolic Simulation for Correct Machine Design},
  author       = {W. C. Carter and William H. Joyner and Daniël Brand},
  year         = {1979},
  journal      = {Proceedings - ACM IEEE Design Automation Conference},
  publisher    = {Association for Computing Machinery},
  volume       = {xix},
  pages        = {280--286},
  doi          = {10.1109/dac.1979.1600119},
}

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