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The Second Generation MOTIS Mixed-Mode Simulator

The work

AuthorsC.-F. Chen; Chi-Yuan Lo; H. N. Nham; P. Subramaniam
Editors
Typemisc
Year1984
Citekeychen1984second

Where it appeared

Published inProceedings - ACM IEEE Design Automation Conference
PublisherAssociation for Computing Machinery
Volume1
Pages10--17

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Abstract

This paper describes the second generation MOTIS mixed-mode simulator. In particular, It extends the current modeling capabilities to include resistors, floating capacitors, and bidirectional transmission gates. It employs a relaxation algorithm with local time-step control for timing simulation, and a switch level approach for unit delay simulation. It provides logic and timing verification for general MOS circuits in a mixed-mode environment. The new simulator is being used for production chips, and it is more accurate, flexible, and efficient than the existing MOTIS mixed-mode simulator.

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Added2026-10-25 08:40 UTC
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Cite it as

@misc{chen1984second,
  title        = {The Second Generation MOTIS Mixed-Mode Simulator},
  author       = {C.-F. Chen and Chi-Yuan Lo and H. N. Nham and P. Subramaniam},
  year         = {1984},
  journal      = {Proceedings - ACM IEEE Design Automation Conference},
  publisher    = {Association for Computing Machinery},
  volume       = {1},
  pages        = {10--17},
  doi          = {10.1109/dac.1984.1585766},
}

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