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Combining Dynamic & Static Scheduling in High-level Synthesis

The work

AuthorsJianyi Cheng; Lana Josipović; George Anthony Constantinides; Paolo Ienne; John Wickerson
Editors
Typemisc
Year2020
Citekeycheng2020combining

Where it appeared

Published inACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)
Pages288--298

Identifiers

DOI10.1145/3373087.3375297
OpenAlexW3008230609

From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.

Abstract

A central task in high-level synthesis is scheduling: the allocation of operations to clock cycles. The classic approach to scheduling is static, in which each operation is mapped to a clock cycle at compile-time, but recent years have seen the emergence of dynamic scheduling, in which an operation's clock cycle is only determined at run-time. Both approaches have their merits: static scheduling can lead to simpler circuitry and more resource sharing, while dynamic scheduling can lead to faster hardware when the computation has non-trivial control flow.

How it got here

How it got hereagent via openalex
Added2026-10-25 20:18 UTC
Not denied bya person 2026-10-29 17:12 UTC

Cite it as

@misc{cheng2020combining,
  title        = {Combining Dynamic \& Static Scheduling in High-level Synthesis},
  author       = {Jianyi Cheng and Lana Josipović and George Anthony Constantinides and Paolo Ienne and John Wickerson},
  year         = {2020},
  journal      = {ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA)},
  pages        = {288--298},
  doi          = {10.1145/3373087.3375297},
}

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