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The design and formal verification of an integrated circuit for use in a floating-point systolic array fast fourier transform processor
The work
| Authors | Peter E. DelVecchio |
|---|---|
| Editors | |
| Type | phdthesis |
| Year | 1990 |
| Citekey | delvecchio1990design |
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-25 11:26 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@phdthesis{delvecchio1990design,
title = {The design and formal verification of an integrated circuit for use in a floating-point systolic array fast fourier transform processor},
author = {Peter E. DelVecchio},
year = {1990},
}
This record lives at https://refs.drheap.org/delvecchio1990design/ and will keep doing so.