Translating programs into delay-insensitive circuits

From bibtex.

Abstract

The subject of this monograph is the design of circuits, in particular delay-insensitive circuits. Delay-insensitive circuits are attractive for a number of reasons. The most important of these reasons is that by designing such circuits many timing problems can be avoided. It is shown that the design of delay-insensitive circuits can be reduced to the design of programs. This is done by presenting a syntax-directed translation of programs into delay-insensitive connections of basic elements. The program notation is a simple one and can be considered a generalization of regular expressions. The notation includes operations to express parallelism, tail recursion, and the introduction of internal symbols. Because of the inclusion of these operations, many components can be expressed in a clear and concise way. The translation method presented yields delay-insensitive connections of circuit elements chosen from a finite basis. The notion 'delay-insensitive' means that the functional behavior of the connection, as specified in the program, is insensitive to delays in wires or basic elements. This notion is rigorously formalized in the monograph. The translation is syntax-directed and, if the program satisfies a certain syntax, it can be carried out in such a way that the number of basic elements in the connection is proportional to the length of the program. Many examples are discussed to illustrate the topics of programming in this notation and of translating these programs into delay-insensitive circuits. The examples include counters, buffers, finite state machines, and token-ring interfaces.