Mixed-size concurrency: ARM, POWER, C/C++11, and SC
The work
| Authors | Shaked Flur; Susmit Sarkar; Christopher Pulte; Kyndylan Nienhuis; Luc Maranget; Kathryn E. Gray; Ali Sezgin; Mark Batty; Peter Sewell |
|---|---|
| Editors | |
| Type | misc |
| Year | 2017 |
| Also known as | flur2016mixedsize |
| Citekey | flur2017mixedsize |
Where it appeared
| Pages | 429--442 |
|---|
Identifiers
| DOI | 10.1145/3009837.3009839 |
|---|---|
| OpenAlex | W2559594945 |
Access
| Landing page | https://doi.org/10.1145/3009837.3009839 |
|---|
From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.
Abstract
Previous work on the semantics of relaxed shared-memory concurrency has only considered the case in which each load reads the data of exactly one store. In practice, however, multiprocessors support mixed-size accesses, and these are used by systems software and (to some degree) exposed at the C/C++ language level. A semantic foundation for software, therefore, has to address them.
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-10-26 12:19 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Filed under
Cite it as
@misc{flur2017mixedsize,
title = {Mixed-size concurrency: ARM, POWER, C/C++11, and SC},
author = {Shaked Flur and Susmit Sarkar and Christopher Pulte and Kyndylan Nienhuis and Luc Maranget and Kathryn E. Gray and Ali Sezgin and Mark Batty and Peter Sewell},
year = {2017},
pages = {429--442},
doi = {10.1145/3009837.3009839},
}
This record lives at https://refs.drheap.org/flur2017mixedsize/ and will keep
doing so. It used to be called flur2016mixedsize, and those addresses still resolve to this one.