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Chiplet Heterogeneous Integration Technology—Status and Challenges
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Abstract
As a heterogeneous integration technology, the chiplet-based design technology integrates multiple heterogeneous dies of diverse functional circuit blocks into a single chip by using advanced packaging technology, which is a promising way to tackle the failure of Moore’s law and Dennard scaling. Currently, as process nodes move forward, dramatically rising cost, design cycle, and complexity are driving industry to focus on the chiplets. Chiplets allows IC designers to merge dies fabricated at different process nodes and reuse them in different projects, which helps to reduce the cost during design and improve yield. In this review, we look back at the industry’s efforts over the past decade and summary the concepts and techniques associated with chiplets. In the end, a discussion and conclusion will be given to forecast the future of chiplets.
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Cite it as
@article{li2020chiplet,
title = {Chiplet Heterogeneous Integration Technology—Status and Challenges},
author = {Tao Li and Jie Hou and Jinli Yan and Rulin Liu and Huiyong Yang and Zhigang Sun},
year = {2020},
journal = {Electronics},
publisher = {Multidisciplinary Digital Publishing Institute},
volume = {9},
number = {4},
pages = {670},
doi = {10.3390/electronics9040670},
}