A. Ning

2 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

F. Gao and others (2023) · IEEE

CIFER: A Cache-Coherent 12-nm 16-mm2 SoC With Four 64-Bit RISC-V Application Cores, 18 32-Bit RISC-V Compute Cores, and a 1541 LUT6/mm2 Synthesizable eFPGA

A. Li and others (2023) · Institute of Electrical and Electronics Engineers (IEEE)