M. Wang

2 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

CIFER: A Cache-Coherent 12-nm 16-mm2 SoC With Four 64-Bit RISC-V Application Cores, 18 32-Bit RISC-V Compute Cores, and a 1541 LUT6/mm2 Synthesizable eFPGA

A. Li and others (2023) · Institute of Electrical and Electronics Engineers (IEEE)

An HMAC processor with integrated SHA-1 and MD5 algorithms

M. Wang and others (2004) · IEEE