Stacey Son
7 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
Cornucopia: Temporal Safety for CHERI Heaps
Nathaniel Wesley Filardo and others (2020) · Proceedings - IEEE Symposium on Security and Privacy/Proceedings of the ... IEEE Symposium on Security and Privacy · IEEE Computer Society
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 8)
Robert N. M. Watson and others (2020) · CL Technical Reports
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 7)
Robert N. M. Watson and others (2019) · CL Technical Reports
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 6)
Robert N. M. Watson and others (2017) · Computer Laboratory, University of Cambridge
Capability Hardware Enhanced RISC Instructions: CHERI Instruction-Set Architecture (Version 5)
Robert N. M. Watson and others (2016) · CL Technical Reports
Fast Protection-Domain Crossing in the CHERI Capability-System Architecture
Robert N. M. Watson and others (2016) · IEEE Micro · Institute of Electrical and Electronics Engineers
CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization
Robert N. M. Watson and others (2015) · Proceedings - IEEE Symposium on Security and Privacy/Proceedings of the ... IEEE Symposium on Security and Privacy · IEEE Computer Society