Thomas Bauereiss

3 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

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Thomas Bauereiss

Thomas Bauereiss, Cambridge: the Sail-based ISA specification work -- rigorous CHERI-MIPS, the verified CHERI-RISC-V security proofs, and the 2026 architecture-semantics library. Three records, 2020-2026.

ArchSem: Reusable Rigorous Semantics of Relaxed Architectures

Thibaut Pérami and others (2026) · Proceedings of the ACM on Programming Languages

Verified Security for the Morello Capability-enhanced Prototype Arm Architecture

Thomas Bauereiss and others (2022) · Programming Languages and Systems (ESOP 2022)

Rigorous Engineering for Hardware Security: Formal Modelling and Proof in the CHERI Design and Implementation Process

Kyndylan Nienhuis and others (2020) · 2020 IEEE Symposium on Security and Privacy (SP)