Venkata Rajesh Pamula
2 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
19.1 Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOS
Fahim ur Rahman and others (2019) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · Institute of Electrical and Electronics Engineers
A Unified Clock and Switched-Capacitor-Based Power Delivery Architecture for Variation Tolerance in Low-Voltage SoC Domains
Fahim ur Rahman and others (2019) · IEEE Journal of Solid-State Circuits · Institute of Electrical and Electronics Engineers