This description was written by a machine and published without a person checking it. It is what the agent made of this grouping, and not a statement anybody has stood behind.
Gordon E. Moore
A grouping.
Scaling of components on integrated circuits, held here as one man revising his own claim: the 1965 Electronics observation, the 1975 IEDM paper halving the rate from a yearly to a two-yearly doubling, and the 1995 SPIE paper locating the binding constraint in lithography rather than in the transistor. Two other Moores in this corpus are different people -- W. R. Moore on fault tolerance (1986) and Robert Moore on enterprise IT energy (2023) -- so membership here is by identity, not surname. dblp: https://dblp.org/pid/83/5340
3 references
Progress in Digital Integrated Electronics [Technical Literature, Copyright 1975 IEEE. Reprinted, with permission. IEDM Tech Digest 1975, pp. 11-13.]
Gordon E. Moore (2006) · IEEE Solid-State Circuits Society Newsletter · Institute of Electrical and Electronics Engineers
Lithography and the future of Moore's law
Gordon E. Moore (1995) · Proceedings of SPIE 2438: Advances in Resist Technology and Processing XII · SPIE
Cramming more components onto integrated circuits
Gordon E. Moore (1965) · Electronics