From low-level fault modeling (of a pipeline attack) to a proven hardening scheme
Where it appeared
| Published in | 33rd ACM SIGPLAN International Conference on Compiler Construction (CC 2024) |
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From bibtex.
Abstract
Fault attacks present unique safety and security challenges that require dedicated countermeasures, even for bug-free programs. Models of these complex attacks are made workable by approximating their effects to a suitable level of abstraction. The common practice of targeting the Instruction Set Architecture (ISA) level is not ideal because it discards important micro-architectural information, leading to weaker security guarantees. Conversely, including microarchitectural details makes countermeasures harder to model and reason about, creating a new challenge in validating and trusting protections. We show that a semantic approach to modeling faults makes micro-architectural models workable, and enables precise cooperation between software and hardware in the design of countermeasures. We demonstrate the approach by designing and implementing a compiler/hardware countermeasure, which protects against a state-of-the-art pipeline fetch attack that generalizes multi-fault instruction skips. Crucially, we provide a formal security proof that guarantees faults are detected by the end of every basic block. This result shows that carefully embracing the complexity of low-level systems enables finer, more secure countermeasures.