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The impact of hardware scheduling mechanisms on the performance and cost of processor designs
The work
| Authors | S. M. Mueller; H. Leister; P. Dell; N. Gerteis; D. Kroening |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 1999 |
| Citekey | mueller1999impact |
Where it appeared
| Published in | 15th GI/ITG Conference ’Architektur von Rechensystemen’ ARCS’99 |
|---|---|
| Publisher | VDE Verlag |
| Pages | 65--73 |
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-25 10:54 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@inproceedings{mueller1999impact,
title = {The impact of hardware scheduling mechanisms on the performance and cost of processor designs},
author = {S. M. Mueller and H. Leister and P. Dell and N. Gerteis and D. Kroening},
year = {1999},
booktitle = {15th GI/ITG Conference ’Architektur von Rechensystemen’ ARCS’99},
publisher = {VDE Verlag},
pages = {65--73},
}
This record lives at https://refs.drheap.org/mueller1999impact/ and will keep doing so.