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Verification of SoC Using Advanced Verification Methodology
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Abstract
The semiconductor industry has evolved significantly since its founding in 1950. Transistors and diodes are the primarily used electronic devices, but advancements in technology have led to more complex semiconductor devices, from printed circuit boards to multimillion gate design, i.e., a System on Chip (SoC) design. Almost 70–80 percent of the total SoC design effort is aimed at functional verification. In this paper, verification of an interconnect block in a processing system is presented. Trace monitoring of the transactions on the Advanced eXtensible Interface (AXI) interface of the interconnect is performed by programming different operational pointers and filters. Results were simulated from Synopsys—a Verilog Compiler Simulator (VCS) tool-2022v (Hyderabad, India).
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Cite it as
@misc{pamula2023verification,
title = {Verification of SoC Using Advanced Verification Methodology},
author = {Pranuti Pamula and Durga Prasad Gorthy and Ngangbam Phalguni Singh and Aravindhan Alagarsamy},
year = {2023},
pages = {12},
doi = {10.3390/hmam2-14160},
}