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A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors

The work

AuthorsMarta Portela-Garcia; C. López-Ongil; M. García-Valderas; Luis Entrena
Editors
Typemisc
Year2007
Citekeyportelagarcia2007rapid

Where it appeared

Published inIEEE International On-Line Testing Symposium (IOLTS)
Pages101--106

Identifiers

DOI10.1109/iolts.2007.9
OpenAlexW2144148609

From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.

Abstract

Processors are very common components in current digital systems and to assess their reliability is an essential task during the design process. In this paper a new fault injection solution to measure SEU sensitivity in processors is presented. It consists in a hardware-implemented module that performs fault injection through the available JTAG-based On-Chip Debugger (OCD). It can be widely applicable to different processors since JTAG standard is an extended interface and OCDs are usually available in current processors. The hardware implementation avoids the communication between the target system and the software debugging tool. The method has been applied to a complex processor, the ARM7TDMI. Results illustrate the approach is a fast, efficient and cost-effective solution.

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Cite it as

@misc{portelagarcia2007rapid,
  title        = {A Rapid Fault Injection Approach for Measuring SEU Sensitivity in Complex Processors},
  author       = {Marta Portela-Garcia and C. López-Ongil and M. García-Valderas and Luis Entrena},
  year         = {2007},
  journal      = {IEEE International On-Line Testing Symposium (IOLTS)},
  pages        = {101--106},
  doi          = {10.1109/iolts.2007.9},
}

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