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Persistency semantics of the Intel-x86 architecture
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Abstract
Emerging non-volatile memory (NVM) technologies promise the durability of disks with the performance of RAM. To describe the persistency guarantees of NVM, several memory persistency models have been proposed in the literature. However, the persistency semantics of the ubiquitous x86 architecture remains unexplored to date. To close this gap, we develop the Px86 (‘persistent x86’) model, formalising the persistency semantics of Intel-x86 for the first time. We formulate Px86 both operationally and declaratively, and prove that the two characterisations are equivalent. To demonstrate the application of Px86, we develop two persistent libraries over Px86: a persistent transactional library, and a persistent variant of the Michael–Scott queue. Finally, we encode our declarative Px86 model in Alloy and use it to generate persistency litmus tests automatically.
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Cite it as
@article{raad2020persistency,
title = {Persistency semantics of the Intel-x86 architecture},
author = {Azalea Raad and John Wickerson and Gil Neiger and Viktor Vafeiadis},
year = {2020},
journal = {Proceedings of the ACM on Programming Languages},
publisher = {Association for Computing Machinery},
volume = {4},
number = {POPL},
pages = {1--31},
doi = {10.1145/3371079},
}
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