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Formal verification of circuit designs
The work
| Authors | R. E. Shostak |
|---|---|
| Editors | T. Uehara; M. Barbacci |
| Type | inproceedings |
| Year | 1983 |
| Citekey | shostak1983formal |
Where it appeared
| Published in | Computer Hardware Description Languages and their Applications (CHDL 83), Pittsburgh |
|---|---|
| Publisher | North-Holland |
| Pages | 13--30 |
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-25 08:44 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@inproceedings{shostak1983formal,
title = {Formal verification of circuit designs},
author = {R. E. Shostak},
editor = {T. Uehara and M. Barbacci},
year = {1983},
booktitle = {Computer Hardware Description Languages and their Applications (CHDL 83), Pittsburgh},
publisher = {North-Holland},
pages = {13--30},
}
This record lives at https://refs.drheap.org/shostak1983formal/ and will keep doing so.