A Prolog-Based System for Hardware Verification
The work
| Authors | Kevin L. Sparks |
|---|---|
| Editors | |
| Type | mastersthesis |
| Year | 1991 |
| Citekey | sparks1991prologbased |
Where it appeared
| Number in series | AFIT/GCE/ENG/91M-05 |
|---|---|
| School | Air Force Institute of Technology |
From bibtex.
Abstract
With the expanding number of components provided on a single digital chip, verification of digital designs is becoming a major problem. The more circuits one places on a single chip, the greater the number of input/ouput combinations which need to be checked. A paper by Barrow in 1984 discusses a Prolog-based hierarchical formal verification system which he calls VERIFY. Barrow provides information on what VERIFY can and cannot do, and on projected enhancements. He does not, however, mention how VERIFY actually performs the task of formal verification. This thesis will provide a description of one possible implementation of the formal verification methodology described in VERIFY.
A copy is held
pdf, 4.3 MB. Not published — it may be under copyright. The facts and links here are.
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-22 23:15 UTC |
| Approved by | a person 2026-10-23 11:27 UTC |
Cite it as
@mastersthesis{sparks1991prologbased,
title = {A Prolog-Based System for Hardware Verification},
author = {Kevin L. Sparks},
year = {1991},
school = {Air Force Institute of Technology},
}
This record lives at https://refs.drheap.org/sparks1991prologbased/ and will keep doing so.