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Formal Methods and VLSI Engineering Practice

The work

AuthorsVictoria Stavridou
Editors
Typearticle
Year1994
Citekeystavridou1994formal

Where it appeared

Published inThe Computer Journal
PublisherOxford University Press
Volume37
Issue2
Pages96--113

Identifiers

DOI10.1093/comjnl/37.2.96
OpenAlexW2147604789

Empty on purpose

copy

Related

Distinct frombowen1994personal
Distinct fromstavridou1994gordons

From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.

Abstract

This paper surveys the state of the art in the use of formal verification for hardware design and discusses the transfer of such methods to industrial practice. We examine the characteristics of the VLSI engineering process and propose a set of criteria for evaluating the applicability of various formal approaches to the design of digital systems. We also discuss some topics for future research to enable effective technology transfer of formal methods to VLSI engineering practice

How it got here

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Added2026-09-22 15:05 UTC
Not denied bya person 2026-10-29 17:12 UTC

Cite it as

@article{stavridou1994formal,
  title        = {Formal Methods and VLSI Engineering Practice},
  author       = {Victoria Stavridou},
  year         = {1994},
  journal      = {The Computer Journal},
  publisher    = {Oxford University Press},
  volume       = {37},
  number       = {2},
  pages        = {96--113},
  doi          = {10.1093/comjnl/37.2.96},
}

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