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Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL
The work
| Authors | Shinya Takamaeda-Yamazaki |
|---|---|
| Editors | |
| Type | misc |
| Year | 2015 |
| Citekey | takamaedayamazaki2015pyverilog |
Where it appeared
| Published in | Lecture notes in computer science |
|---|---|
| Publisher | Springer Science+Business Media |
| Pages | 451--460 |
Identifiers
| DOI | 10.1007/978-3-319-16214-0_42 |
|---|---|
| OpenAlex | W347636100 |
Access
| Landing page | https://doi.org/10.1007/978-3-319-16214-0_42 |
|---|
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-10-24 23:22 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Filed under
Cite it as
@misc{takamaedayamazaki2015pyverilog,
title = {Pyverilog: A Python-Based Hardware Design Processing Toolkit for Verilog HDL},
author = {Shinya Takamaeda-Yamazaki},
year = {2015},
journal = {Lecture notes in computer science},
publisher = {Springer Science+Business Media},
pages = {451--460},
doi = {10.1007/978-3-319-16214-0_42},
}
This record lives at https://refs.drheap.org/takamaedayamazaki2015pyverilog/ and will keep doing so.