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Toward formal verification of VHDL specifications
The work
| Authors | John van Tassel; David Hemmendinger |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 1989 |
| Citekey | vantassel1989formal |
Where it appeared
| Published in | Applied Formal Methods For Correct VLSI Design |
|---|---|
| Pages | 261--270 |
How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-10-25 06:42 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Filed under
Cite it as
@inproceedings{vantassel1989formal,
title = {Toward formal verification of VHDL specifications},
author = {John van Tassel and David Hemmendinger},
year = {1989},
booktitle = {Applied Formal Methods For Correct VLSI Design},
pages = {261--270},
}
This record lives at https://refs.drheap.org/vantassel1989formal/ and will keep doing so.