BlueVeri: Formal Security Verification for Bluespec Processor Designs

The work

AuthorsShih-Yu Wang
Editors
Typemastersthesis
Year2025
Citekeywang2025blueveri

Where it appeared

SchoolMassachusetts Institute of Technology, Department of Electrical Engineering and Computer Science

From bibtex.

Abstract

There are numerous hardware security defense mechanisms designed to mitigate sidechannel attacks. However, ensuring that a defense can comprehensively protect against an entire class of attacks, while avoiding the introduction of new vulnerabilities that could lead to additional attack surfaces, remains a significant challenge. Although researchers have attempted to apply formal verification techniques to hardware security, these efforts have been hindered by scalability issues. In this paper, we introduce BlueVeri, a systematic and automatable approach for formally verifying the security of a Bluespec processor against speculative execution attacks. BlueVeri leverages the high-level information provided by Bluespec’s guarded atomic actions, simplifying and accelerating the verification process. We evaluate BlueVeri on out-of-order processors implemented in Bluespec, demonstrating that our approach substantially enhances verification scalability and is capable of proving the security properties of a minimal out-of-order processor within one hour.

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How it got here

How it got hereagent via bibtex
Added2026-10-22 21:00 UTC
Approved bya person 2026-10-22 22:41 UTC

Filed under

hardware-security

Cite it as

@mastersthesis{wang2025blueveri,
  title        = {BlueVeri: Formal Security Verification for Bluespec Processor Designs},
  author       = {Shih-Yu Wang},
  year         = {2025},
  school       = {Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science},
}

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