A Simplified Arm Processor for VLSI Education
The work
| Title | A Simplified Arm Processor for VLSI Education |
|---|---|
| Authors | Noah Boorstin; Veronica Cortes; Kaveh Pezeshki; David Harris; Shuojin Hang |
| Type | conference paper |
| Year | 2020 |
| Citekey | boorstin2020simplified |
Where it appeared
| Published in | Proceedings of the Great Lakes Symposium on VLSI 2020 |
|---|---|
| Publisher | Association for Computing Machinery |
| Pages | 555--559 |
Identifiers
| DOI | 10.1145/3386263.3406920 |
|---|---|
| OpenAlex | W3083686196 |
Access
| Landing page | https://doi.org/10.1145/3386263.3406920 |
|---|
Abstract
This paper describes a simplified Arm processor for VLSI education. The processor implements an 8-bit datapath and a subset of the instructions so that it fits on a 1.5 x 1.5 mm MOSIS TinyChip in an ON Semiconductor 0.6 um process. During a sequence of four labs, students learn digital integrated circuit design with commercial CAD tools from Cadence and Synopsys. The processor and cell library are provided, missing one of each interesting component for the student to design. The first lab covers leaf cell schematic and layout entry. The second generates a wordslice and adds it to the datapath. The third involves hand design of a small block of random logic for the aludecoder, and synthesis and placement and routing of the rest of the controller. The fourth lab completes chip assembly, connecting the components to the pad frame. Each lab also involves logic verification, DRC, LVS, and debug. At the end of the labs, students are prepared to define and complete an open-ended final project chip.
Copy held
| Kind | PDF, 27.6 MB |
|---|---|
| Retrieved | 2026-08-05 |
| Held | local, for personal reference |
| Where it came from | https://doi.org/10.1145/3386263.3406920 |
Where this came from
| How it got here | the agent went looking · found via openalex |
|---|---|
| First seen | 2026-08-04 |
| Standing | endorsed |
| Approved | 2026-08-07 |
Cite it as
@inproceedings{boorstin2020simplified,
title = {A Simplified Arm Processor for VLSI Education},
author = {Noah Boorstin and Veronica Cortes and Kaveh Pezeshki and David Harris and Shuojin Hang},
year = {2020},
booktitle = {Proceedings of the Great Lakes Symposium on VLSI 2020},
pages = {555--559},
publisher = {Association for Computing Machinery},
doi = {10.1145/3386263.3406920},
url = {https://doi.org/10.1145/3386263.3406920},
}
This record lives at https://refs.drheap.org/boorstin2020simplified/ and will keep doing so.