Verification of Asynchronous Circuits using Timed Automata
The work
| Authors | Marius Bozga; Jianmin Hu; Oded Maler; Sergio Yovine |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 2002 |
| Citekey | bozga2002verification |
Where it appeared
| Published in | Electronic Notes in Theoretical Computer Science: Theory and Practice of Timed Systems (TPTS 2002) |
|---|---|
| Pages | 47--59 |
Identifiers
| DOI | 10.1016/s1571-0661(04)80468-7 |
|---|
Access
| Landing page | https://hal.science/hal-00374812 |
|---|
Related
| Distinct from | manohar1995quasidelayinsensitive |
|---|---|
| Distinct from | martin1985delayinsensitive |
| Distinct from | mishra1985hierarchical |
| Distinct from | porcher2012synthese |
From bibtex.
Abstract
In this work we apply the timing verification tool OpenKronos, which is based on timed automata, to verify correctness of numerous asynchronous circuits. The desired behavior of these circuits is specified in terms of signal transition graphs (STG) and we check whether the synthesized circuit behaves correctly under the assumption that the inputs satisfy the STG conventions and that the gate delays are bounded between two given numbers. Our results demonstrate the viability of the timed automaton approach for timing analysis of certain classes of circuits.
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How it got here
| How it got here | agent via bibtex |
|---|---|
| Added | 2026-09-17 10:22 UTC |
| Approved by | a person 2026-09-17 16:51 UTC |
Cite it as
@inproceedings{bozga2002verification,
title = {Verification of Asynchronous Circuits using Timed Automata},
author = {Marius Bozga and Jianmin Hu and Oded Maler and Sergio Yovine},
year = {2002},
booktitle = {Electronic Notes in Theoretical Computer Science: Theory and Practice of Timed Systems (TPTS 2002)},
pages = {47--59},
doi = {10.1016/s1571-0661(04)80468-7},
}
This record lives at https://refs.drheap.org/bozga2002verification/ and will keep doing so.