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CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Where it appeared

Published inIEEE Custom Integrated Circuits Conference (CICC)
Pages1--2

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Abstract

Embedded FPGAs (eFPGA) are increasingly being used in SoCs, enabling post-silicon hardware specialization. Existing CPU-eFPGA SoCs have three deficiencies. First, their low core count hinders efficient execution of thread-level-parallel workloads. Second, noncoherent or partially coherent CPU-eFPGA integration inhibits dynamic, random memory sharing. Third, the use of full-custom circuits makes proprietary eFPGAs technology-dependent, inflexible in physical layout, and lacking architectural customizability.

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Added2026-10-27 06:32 UTC
Not denied bya person 2026-10-29 17:12 UTC

Cite it as

@misc{chang2023cifer,
  title        = {CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA},
  author       = {Ting-Jung Chang and Ang Li and Fei Gao and Tuan Ta and Georgios Tziantzioulis and Yanghui Ou and Moyang Wang and Jinzheng Tu and Kaifeng Xu and Paul J. Jackson and August Ning and Grigory Chirkov and Marcelo Orenes-Vera and Shady O. Agwa and Xiaoyu Yan and Eric Tang and Jonathan Balkind and Christopher Batten and David Wentzlaff},
  year         = {2023},
  journal      = {IEEE Custom Integrated Circuits Conference (CICC)},
  pages        = {1--2},
  doi          = {10.1109/cicc57935.2023.10121294},
}

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