Christopher Batten

5 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

Scalable, Programmable and Dense: The HammerBlade Open-Source RISC-V Manycore

Dai Cheol Jung and others (2024) · ACM/IEEE International Symposium on Computer Architecture (ISCA)

CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm2 1.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA

Ting-Jung Chang and others (2023) · IEEE Custom Integrated Circuits Conference (CICC)

PyH2: Using PyMTL3 to Create Productive and Open-Source Hardware Testing Methodologies

Shunning Jiang and others (2020) · IEEE Design and Test · Institute of Electrical and Electronics Engineers

Efficiently Supporting Dynamic Task Parallelism on Heterogeneous Cache-Coherent Systems

Moyang Wang and others (2020) · ACM/IEEE International Symposium on Computer Architecture (ISCA)

The Celerity Open-Source 511-Core RISC-V Tiered Accelerator Fabric: Fast Architectures and Design Methodologies for Fast Chips

Scott Davidson and others (2018) · IEEE Micro · Institute of Electrical and Electronics Engineers