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900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading

The work

AuthorsJuang-Ying Chueh; Visvesh Sathe; Marios C. Papaefthymiou
Editors
Typemisc
Year2006
Citekeychueh2006900mhz

Where it appeared

Published inIEEE Custom Integrated Circuits Conference (CICC)
Pages777--780

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Abstract

A resonant clock network with programmable driver and loading is designed in a 0.13mum CMOS technology. The 2mm times 2mm distribution network has on-chip inductors and performs a forced oscillation at the rate of a reference clock programmable in the 900MHz to 1.2GHz range. Clock amplitude and energy efficiency trade-offs at and off resonance are explored with various driver configurations. Energy efficiency per cycle is 1.39 to 1.56 times greater than previous resonant distribution networks

How it got here

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Added2026-10-27 17:50 UTC
Not denied bya person 2026-10-29 17:12 UTC

Cite it as

@misc{chueh2006900mhz,
  title        = {900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading},
  author       = {Juang-Ying Chueh and Visvesh Sathe and Marios C. Papaefthymiou},
  year         = {2006},
  journal      = {IEEE Custom Integrated Circuits Conference (CICC)},
  pages        = {777--780},
  doi          = {10.1109/cicc.2006.320995},
}

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