Visvesh Sathe

8 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.

19.1 Computationally Enabled Total Energy Minimization Under Performance Requirements for a Voltage-Regulated 0.38-to-0.58V Microprocessor in 65nm CMOS

Fahim ur Rahman and others (2019) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · Institute of Electrical and Electronics Engineers

A Unified Clock and Switched-Capacitor-Based Power Delivery Architecture for Variation Tolerance in Low-Voltage SoC Domains

Fahim ur Rahman and others (2019) · IEEE Journal of Solid-State Circuits · Institute of Electrical and Electronics Engineers

Quasi-Resonant Clocking: Continuous Voltage-Frequency Scalable Resonant Clocking System for Dynamic Voltage-Frequency Scaling Systems

Fahim ur Rahman and others (2018) · IEEE Journal of Solid-State Circuits · Institute of Electrical and Electronics Engineers

Analysis and optimization of CMOS switched-capacitor converters

Visvesh Sathe and others (2015) · IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED)

Resonant-Clock Design for a Power-Efficient, High-Volume x86-64 Microprocessor

Visvesh Sathe and others (2013) · IEEE Journal of Solid-State Circuits · Institute of Electrical and Electronics Engineers

RF2: A 1GHz FIR Filter with Distributed Resonant Clock Generator

Visvesh Sathe and others (2007) · IEEE Symposium on VLSI Circuits (VLSI-Circuits)

900MHz to 1.2GHz Two-Phase Resonant Clock Network with Programmable Driver and Loading

Juang-Ying Chueh and others (2006) · IEEE Custom Integrated Circuits Conference (CICC)

A 1.1ghz charge-recovery logic

Visvesh Sathe and others (2006) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · Institute of Electrical and Electronics Engineers