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A 1.1ghz charge-recovery logic
The work
| Authors | Visvesh Sathe; Juang-Ying Chueh; Marios C. Papaefthymiou |
|---|---|
| Editors | |
| Type | misc |
| Year | 2006 |
| Citekey | sathe200611ghz |
Where it appeared
| Published in | Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference |
|---|---|
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 1540--1549 |
Identifiers
| DOI | 10.1109/isscc.2006.1696205 |
|---|---|
| OpenAlex | W2063281993 |
Access
| Landing page | https://doi.org/10.1109/isscc.2006.1696205 |
|---|
From OpenAlex, which stores abstracts as an index of words and their positions: what is shown is rebuilt from that, and reads fluently whether or not it is what the author wrote.
Abstract
A GHz-class dynamic charge-recovery logic is implemented with an on-chip clock generator and integrated inductor in a 0.13mum CMOS process. The chip operation is verified at clock frequencies up to 1.3GHz. At its natural frequency, the design recovers 60% of total circuit energy every cycle
How it got here
| How it got here | agent via openalex |
|---|---|
| Added | 2026-10-27 17:48 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Cite it as
@misc{sathe200611ghz,
title = {A 1.1ghz charge-recovery logic},
author = {Visvesh Sathe and Juang-Ying Chueh and Marios C. Papaefthymiou},
year = {2006},
journal = {Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference},
publisher = {Institute of Electrical and Electronics Engineers},
pages = {1540--1549},
doi = {10.1109/isscc.2006.1696205},
}
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