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Automatic and semi-automatic verification of switch-level circuits with temporal logic and binary decision diagrams
The work
| Authors | M. Fujita; Y. Matsunaga; T. Kakuda |
|---|---|
| Editors | |
| Type | inproceedings |
| Year | 1990 |
| Also known as | fujitaautomatic |
| Citekey | fujita1990automatic |
Where it appeared
| Published in | 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers |
|---|---|
| Publisher | IEEE Comput. Soc. Press |
| Pages | 38--41 |
Identifiers
| DOI | 10.1109/iccad.1990.129834 |
|---|
Access
| Landing page | https://doi.org/10.1109/iccad.1990.129834 |
|---|
How it got here
| How it got here | agent via crossref |
|---|---|
| Added | 2026-10-25 03:29 UTC |
| Not denied by | a person 2026-10-29 17:12 UTC |
Filed under
Cite it as
@inproceedings{fujita1990automatic,
title = {Automatic and semi-automatic verification of switch-level circuits with temporal logic and binary decision diagrams},
author = {M. Fujita and Y. Matsunaga and T. Kakuda},
year = {1990},
booktitle = {1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers},
publisher = {IEEE Comput. Soc. Press},
pages = {38--41},
doi = {10.1109/iccad.1990.129834},
}
This record lives at https://refs.drheap.org/fujita1990automatic/ and will keep
doing so. It used to be called fujitaautomatic, and those addresses still resolve to this one.