A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior

The work

AuthorsJoel Hestness; Stephen W. Keckler; David A. Wood
Editors
Typeinproceedings
Year2014
Citekeyhestness2014comparative

Where it appeared

Published in2014 IEEE International Symposium on Workload Characterization (IISWC)
PublisherIEEE
Pages150--160

Abstract

While heterogeneous CPU/GPU systems have been traditionally implemented on separate chips, each with their own private DRAM, heterogeneous processors are integrating these different core types on the same die with access to a common physical memory. Further, emerging heterogeneous CPU-GPU processors promise to offer tighter coupling between core types via a unified virtual address space and cache coherence. To adequately address the potential opportunities and pitfalls that may arise from this tighter coupling, it is important to have a deep understanding of application- and memory-level demands from both CPU and GPU cores. This paper presents a detailed comparison of memory access behavior for parallel applications executing on each core type in tightly-controlled heterogeneous CPU-GPU processor simulation. This characterization indicates that applications are typically designed with similar algorithmic structures for CPU and GPU cores, and each core type's memory access path has a similar locality filtering role. However, the different core and cache microarchitectures expose substantially different memory-level parallelism (MLP), which results in different instantaneous memory access rates and sensitivity to memory hierarchy architecture.

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Added2026-08-04 00:00 UTC
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Cite it as

@inproceedings{hestness2014comparative,
  title        = {A comparative analysis of microarchitecture effects on CPU and GPU memory system behavior},
  author       = {Joel Hestness and Stephen W. Keckler and David A. Wood},
  year         = {2014},
  booktitle    = {2014 IEEE International Symposium on Workload Characterization (IISWC)},
  publisher    = {IEEE},
  pages        = {150--160},
  doi          = {10.1109/iiswc.2014.6983054},
}

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