A Survey of Formal Hardware Verification Tools Developed in Europe

The work

AuthorsJean Mermet; Adam Morawiec
Editors
Typeinproceedings
Year1997
Citekeymermet1997survey

Where it appeared

Published inAsia-Pacific Conference on Hardware Description Languages (APCHDL'97)

Related

Distinct fromcamilleri1988simulation
Distinct fromcohn1987proof
Distinct fromguzmanmiranda2025fvm
Distinct fromherbert1988case
Distinct fromjoyce1988formal
Distinct fromkumar1996formal
Distinct frommelham1993higher
Distinct fromoulkaid2025modeles

From bibtex.

Abstract

This article gives a survey on formal hardware verification tools developed in Europe. It describes the main objectives and domains of application of the formal methods for the verification of electronic systems. Further, it gives an overview of the formal methods used in the most significant European research in this domain. It attempts to introduce some classification scheme for the existing commercial or prototype tools, which is based on the different verification aspects: type of the circuit to verify, abstraction level, verification objective, mathematical model, formal proof technique, input formalism, diagnostic method incorporated and the others. The most significant features of the methods and tools are summarized, and some advantages and drawbacks are discussed. Finally, some conclusions concerning the possible future trends in development are drawn.

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How it got here

How it got hereagent via bibtex
Added2026-09-15 21:43 UTC
Approved bya person 2026-09-16 09:29 UTC

Cite it as

@inproceedings{mermet1997survey,
  title        = {A Survey of Formal Hardware Verification Tools Developed in Europe},
  author       = {Jean Mermet and Adam Morawiec},
  year         = {1997},
  booktitle    = {Asia-Pacific Conference on Hardware Description Languages (APCHDL'97)},
}

This record lives at https://refs.drheap.org/mermet1997survey/ and will keep doing so.