Nasser A. Kurd
2 references under this name, matched as it is written. Somebody else may write under it too, and the same person may appear here spelled another way.
19.4 A 0.17-to-3.5mW 0.15-to-5GHz SoC PLL with 15dB built-in supply noise rejection and self-bandwidth control in 14nm CMOS
Kuan-Yueh James Shen and others (2016) · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · Institute of Electrical and Electronics Engineers
Next generation Intel® micro-architecture (Nehalem) clocking architecture
Nasser A. Kurd and others (2008) · IEEE Symposium on VLSI Circuits (VLSI-Circuits)